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DTSTAMP:20181221T160725Z
LOCATION:D170
DTSTART;TZID=America/Chicago:20181111T090000
DTEND;TZID=America/Chicago:20181111T090200
UID:submissions.supercomputing.org_SC18_sess149_wksp113@linklings.com
SUMMARY:Introduction - MCHPC’18: Workshop on Memory Centric High Performan
 ce Computing
DESCRIPTION:Workshop\nMemory, NVRAM, Parallel Programming Languages, Libra
 ries, and Models, Workshop Reg Pass\n\nIntroduction - MCHPC’18: Workshop o
 n Memory Centric High Performance Computing\n\nYan, Brightwell, Sun, Gokha
 le\n\nThe growing disparity between CPU speed and memory speed, known as t
 he memory wall problem, has been one of the most critical and long-standin
 g challenges in the computing industry. The situation is further complicat
 ed by the recent expansion of the memory hierarchy, which is becoming deep
 er and more diversified with the adoption of new memory technologies and a
 rchitectures including 3D-stacked memory,  non-volatile random-access memo
 ry (NVRAM), memristor, hybrid software and hardware caches, etc. Computer 
 architecture and hardware system, operating systems, storage and file syst
 ems, programming stack, performance model and tools are being enhanced, au
 gmented, or even redesigned to address the performance, programmability an
 d energy efficiency challenges of the increasingly complex and heterogeneo
 us memory systems for HPC and data-intensive applications.\n\nThe MCHPC w
 orkshop aims to bring together computer and computational science research
 ers, from industry, government labs and academia, concerned with the chall
 enges of efficiently using existing and emerging memory systems.
URL:https://sc18.supercomputing.org/presentation/?id=wksp113&sess=sess149
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