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DTSTART:19700308T020000
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DTSTART:19701101T020000
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BEGIN:VEVENT
DTSTAMP:20181221T160903Z
LOCATION:C145
DTSTART;TZID=America/Chicago:20181112T083000
DTEND;TZID=America/Chicago:20181112T170000
UID:submissions.supercomputing.org_SC18_sess249_tut156@linklings.com
SUMMARY:Application Porting and Optimization on GPU-Accelerated POWER Arch
 itectures
DESCRIPTION:Tutorial\nArchitectures, Compiler Analysis and Optimization, H
 eterogeneous Systems, Performance, Tools, Tutorial Reg Pass\n\nApplication
  Porting and Optimization on GPU-Accelerated POWER Architectures\n\nPleite
 r, Hagleitner, Herten, Papatheodore, Ravindar...\n\nThe POWER processor ha
 s re-emerged as a technology for supercomputer architectures. One major re
 ason is the tight integration of processor and GPU accelerator through the
  NVLink technology. Two major sites in the US, ORNL and LLNL, have already
  decided to have their pre-exascale systems being based on this new archit
 ecture (Summit and Sierra, respectively). This tutorial will give an oppor
 tunity to obtain in-depth knowledge and experience with GPU-accelerated PO
 WER nodes. It focuses on porting applications to a single node and covers 
 the topics architecture, compilers, performance analysis and tuning, and m
 ulti-GPU programming. The tutorial will include an overview of the NVLink-
 based node architectures, lectures on first-hand experience in porting to 
 this architecture, and exercises using tools to focus on performance.
URL:https://sc18.supercomputing.org/presentation/?id=tut156&sess=sess249
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